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Functional Safety Launch
For companies interested in a new Functional Safety initiative for silicon libraries, ASICs or SOCs, start here. Launch activities include:
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ISO 26262 training courses (English) delivered onsite or remotely with a focus on semiconductors and SEooC development
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Architecture analysis to discover weak points regarding safety and identify opportunities for decomposition of safety requirements
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Project Planning to create a safety plan that delivers the required activities and work products needed to present a safety case to assessors or customers
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Project team coaching to guide and assist the team as they develop functional safety work products
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Architecture Analysis
We take a systematic approach to review system-on-a-chip and application-specific architectures for use in safety-related applications. We use the following methods to identify risk in the architecture when it comes to meeting safety goals and derived safety requirements:
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Fault Tree Analysis
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Dependent Failure Analysis
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Failure Mode and Effects Analysis
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Design Failure Mode and Effects Analysis
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SOTIF and STPA
We have worked with most of the industry standard tools, but can also provide templates and methodologies if none exist. Architecture weaknesses are categorized by risk and action plans are created to address risks.
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Functional Safety Expert Coaching
For teams that already work on safety-related silicon that need additional guidance and practical interpretation and application of the standards in their project context, we bring seasoned experts to help. These bespoke engagements provide the exact support needed for a defined scope of work
Semiconductors and Functional Safety
We have deep experience working with Semiconductor venders when it comes to Functional Safety compliance according to ISO 26262. Kevin started his engineering career as an ASIC designer using .35nm technology! We have worked on a variety of SOC and ASIC projects since with a focus on the application of ISO 26262 to semiconductor architectures.